Based on the current technology, inserting a single record into a priority sorted list in a single clock cycle at 123 MHz is possible. This structure was very valuable in the current generation TCI110 catalog product from TI Wireless Infrastructure. For the next generation product, there arose a need for a structure that can accept two records simultaneously into the sorted list.
There is much prior art literature and patents involving sorting but none addressed the problem of simultaneous insertion of multiple records. Multiple methods and hardware implementations of sorting networks that process and sort records in series have been extensively studied and analyzed in the prior art. In addition, there are descriptions of parallel sorting of multiple records by using multiple pipelined processors over multiple cycles. The current art does not describe single cycle sorting and insertion hardware.